| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | doc(slang): fix minor typo (#5047) | Nicolas Derumigny | 2025-10-26 | 1 | -4/+4 |
| * | Add support for verible: language server + fixer (#4994) | Nicolas Derumigny | 2025-08-13 | 1 | -1/+76 |
| * | Implement Lua ALE setup & overhaul documentation | w0rp | 2025-03-27 | 1 | -15/+37 |
| * | Slang linter for Verilog. (#4713) | AlvinRolling | 2024-02-22 | 1 | -3/+15 |
| * | codespell: fix spelling errors picked out by `codespell` (#4343) | Ben Boeckel | 2022-10-29 | 1 | -1/+1 |
| * | Add Yosys linter for Verilog files. (#3713) | Nathan Sharp | 2021-07-12 | 1 | -1/+25 |
| * | Adds hdl_checker LSP support (#2804) | Andre Souto | 2020-08-06 | 1 | -1/+17 |
| * | Add VHDL Support & Newer Verilog Linters (#2229) | John Gentile | 2019-01-27 | 1 | -1/+60 |
| * | Use equal signs for language documentation sections | w0rp | 2017-07-08 | 1 | -4/+4 |
| * | Adds an option to pass additional arguments to the verilog/verilator … (#698) | Tarik Graba | 2017-06-29 | 1 | -0/+43 |